Generally open-drain or open-collector output pin is driven by single transistor which when switched OFF is in High-Impedance/Floating Z, and when ON drives to ouput.
- Open-drain (open-collector in BJT) can be connected from multiple devices to the same signal line using a common pull up register. Its also known as Wired-OR in HDL(Verilog, VHDL).
- Some of the common examples of connection multiple output to a single wire is, Digital multiplexer(E.g. 8x1 Multiplexer) Connection of <FSTAT> pin signal in SPI Protocol to indicate failure in the system when one of the multiple SPI devices fails, Multiple reset signals to a common device etc.
- Open-drain (open-collector in BJT) can be connected from multiple devices to the same signal line using a common pull up register. Its also known as Wired-OR in HDL(Verilog, VHDL).
- Some of the common examples of connection multiple output to a single wire is, Digital multiplexer(E.g. 8x1 Multiplexer) Connection of <FSTAT> pin signal in SPI Protocol to indicate failure in the system when one of the multiple SPI devices fails, Multiple reset signals to a common device etc.
