About
About This Blog
Welcome to VLSI Design & Verification — a technical blog dedicated to helping hardware engineers become better at their craft. I write in-depth articles on verification methodology, protocol architecture, and the software engineering practices that make verification scalable.
About Me
I'm a VLSI Design and Verification Engineer with hands-on experience building UVM testbenches, verifying complex SoC designs, and working with industry-standard protocols like PCIe and AMBA. I've worked across the verification stack — from IP-level block verification to full-chip SoC integration — and I started this blog to share the practical knowledge that's hard to find in textbooks.
My background spans both hardware verification and software engineering, and I believe the intersection of these disciplines is where the most impactful improvements in verification productivity happen. That perspective shapes everything I write here.
What You'll Find Here
- UVM & SystemVerilog — Sequences, register models, coverage strategies, and reusable verification patterns explained from first principles
- PCIe for DV Engineers — A multi-part series breaking down PCIe architecture, the protocol stack, TLP transactions, and LTSSM for verification engineers
- Software Engineering for DV — Design patterns, complexity analysis, memory management, and programming paradigms applied to verification
- Low Power Verification — UPF-based flows and power-aware verification techniques
- Conference Papers — Curated collections of DVCon and arXiv papers relevant to verification engineers
- RTL Design — Complete Verilog/SystemVerilog design examples with testbenches
Every article aims to go beyond surface-level explanations. I include real code examples, terminal output from actual tools, and practical insights drawn from real project experience.
Contact
Have a question, suggestion, or want to discuss a topic? Leave a comment on any post — every post has a comment section, and I read and respond to all of them. It's the best way to start a conversation.
Thanks for reading.